Universal Remote Control R7 - SPECS SHEET Instrukcja Użytkownika Pobierz pdf (Strona 17)

Data Sheet ADP5586

Rev. 0 | Page 17 of 44

C-compatible

serial interface. The interface can support clock frequencies of

up to 1 MHz. If the user is accessing the FIFO or key event

counter (KEC), FIFO/KEC updates are paused. If the clock

frequency is very low, events may not be recorded in a timely

manner. FIFO or KEC updates can happen up to 23 µs after an

interrupt is asserted because of the number of I

C cycles required

to perform an I

C read or write. This delay should not present

an issue to the user.

Figure 24 shows a typical write sequence for programming an

internal register. The cycle begins with a start condition, followed

by the hard coded 7-bit device address, which for the ADP5586

is 0x34, followed by the R/

bit set to 0 for a write cycle. The

ADP5586 acknowledges the address byte by pulling the data

line low. The address of the register to which data is to be written

is sent next. The ADP5586 acknowledges the register pointer

byte by pulling the data line low. The data byte to be written is

sent next. The ADP5586 acknowledges the data byte by pulling

the data line low. A stop condition completes the sequence.

Figure 25 shows a typical multibyte write sequence for program-

ming internal registers. The cycle begins with a start condition

followed by the 7-bit device address (0x34), followed by the

bit, which is set to 0 for a write cycle. The ADP55866

acknowledges the address byte by pulling the data line low.

The address of the register to which data is to be written is sent

next. The ADP5586 acknowledges the register pointer byte by

pulling the data line low. The data byte to be written is sent next.

The ADP5586 acknowledges the data byte by pulling the data

line low. The pointer address is then incremented to write the

next data byte, until it finishes writing the n data byte. The

ADP5586 pulls the data line low after every byte, and a stop

condition completes the sequence.

Figure 26 shows a typical byte read sequence for reading inter-

nal registers. The cycle begins with a start condition followed

by the 7-bit device address, followed by the R/

bit set to 0 for

a write cycle. The ADP5586 acknowledges the address byte by

pulling the data line low. The address of the register from which

data is to be read is sent next. The ADP5586 acknowledges the

tion is repeated, followed by the 7-bit device address (0x34),

followed by the R/

bit set to 1 for a read cycle. The ADP5586

acknowledges the address byte by pulling the data line low. The

8-bit data is then read. The host pulls the data line high (no

acknowledge), and a stop condition completes the sequence.

START

0 = WRITE

7-BIT DEVICE ADDRESS

ADP5586 ACK

8-BIT REGISTER POINTER 8-BIT WRITE DATA0 0 0 0

ADP5586 ACK

STOP

11148-024

Figure 24. I

C Single Byte Write Sequence

START

0 = WRITE

7-BIT DEVICE ADDRESS

ADP5586 ACK

8-BIT REGISTER POINTER WRITE BYTE 1 WRITE BYTE 2 WRITE BYTE n0 0 0 0

0 0

ADP5586 ACK ADP5586 ACK ADP5586 ACK ADP5586 ACK

ADP5586 ACK

STOP

11148-025

Figure 25. I

C Multibyte Write Sequence

START

0 = WRITE

7-BIT DEVICE ADDRESS

ADP5586 ACK

8-BIT REGISTER POINTER

8-BIT READ DATA

0 0 0 1 0 1

REPEAT START 1 = READ

ADP5586 ACK

NO ACK

STOP

11148-026

Figure 26. I

C Single Byte Read Sequence

1 2 ... 12 13 14 15 16 17 18 19 20 21 22 ... 43 44

Komentarze do niniejszej Instrukcji

Brak uwag

Universal Remote Control R7 - SPECS SHEET Instrukcja Użytkownika Strona 17

Komentarze do niniejszej Instrukcji

Powiązane produkty i podręczniki dla Zdalne sterowanie Universal Remote Control R7 - SPECS SHEET